[Joint CQSE & NCTS Seminar] Prospective Structures and Materials for Semiconductor Devices Scaling

Title: [Joint CQSE & NCTS Seminar] Prospective Structures and Materials for Semiconductor Devices Scaling
Speaker: Prof. Chun-Jung Su (Department of Physics, National Yang Ming Chiao Tung University)
Date: May 13, 2022, 14:30-15:30
Place: Online
Link: https://nationaltaiwanuniversity-zbh.my.webex.com/nationaltaiwanuniversity-zbh.my/j.php?MTID=m3efd6c4a404b85f1e7a186a89d9b9009

This talk will present an overview and perspective on advanced technologies required for continued scaling of leading edge and emerging semiconductor devices. The drive to continue improving semiconductor power, performance, area and cost scaling (PPAC) is enabled by new structures and materials. The devices migrating from 2D into 3D architectures and integration unleash a new era for both high performance and low power requirements. Beyond the Si-based materials, 2D materials (2DMs) possess reasonable mobility and bandgap in the sub-nm thickness regime. They have been demonstrated with desirable FET performance and nonvolatile memory (NVM) effects, thus offering advantages for realizing ultrathin logic and embedded memory devices to enable high integration density. Accordingly, the 3D integrated architecture based on ultrathin active layers with co-existence of CMOS and NVM functions with Si-compatible process will be of great potential for 3D in-memory computing and energy-efficient electronics applications.

Biography Brief:
Dr. Chun-Jung Su is currently an Associate Professor at Dept. Electrophysics, National Yang Ming Chiao Tung University (NYCU). He received the B.S. degree in Dept. Materials Science & Engineering and the Ph.D. degree in the Institute of Electronics, both at National Chiao Tung University, Taiwan, in 2002 and 2008, respectively. Prior to joining NYCU, he was with Taiwan Semiconductor Research Institute (TSRI) and with TSMC for exploratory device research and pathfinding. His current research interests are emerging transistor structures, ferroelectric thin films, two-dimensional materials, and applications of nanoscale devices. He has demonstrated steep-slope Si and Ge fin/nanowire ferroelectric FETs, and 3D stacked logic/memory co-integrated architectures. Dr. Su received the Outstanding Youth Award from the Electronics Devices and Materials Association (EDMA) in 2019, and Excellent Technical Achievement Award from National Applied Research Laboratories (NARLabs) in 2019, 2020 and 2021. He has served as the technical program committee member of the IEEE Electron Devices Technology and Manufacturing (EDTM) Conference and International SiGe Technology and Device Meeting (ISTDM) Conference.